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Communication ICs
DTMF receiver for telephones
BU8871F
The BU8871F is a DTMF receiver ICs developed for use in telephone answering machines, and converts 16 different types of DTMF signals into 4-bit binary serial data. It features a wide dynamic range, eliminating the need for an external input amplifier. Expertise from a number of companies has been incorporated into these products to enable guard time control through a host microcomputer. FApplications Telephone answering machines FFeatures 1) Dynamic range of 45dB. (internal AGC) 2) 4-bit binary serial data output. 3) Guard time can be controlled through host microcontroller. FBlock diagram
4) Input pins equipped with hysteresis. (ACK pin) 5) 4.19MHz crystal resonator can be used.
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FAbsolute maximum ratings (Ta=25_C)
BU8871F
FRecommended operating conditions (Ta=25_C)
FPin descriptions
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FInput / output circuits
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FElectrical characteristics DC characteristics (unless otherwise noted, Ta=25_C, VDD=5.0V)
BU8871F
AC characteristics (unless otherwise noted, Ta=25_C, VDD=5.0V)
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FMeasurement circuits
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FCircuit operation (1) An overview of operation A DTMF signal is supplied to the INPUT pin and applied to a pair of 6th-order bandpass filters, which separate the DTMF signal into its high (COL) and low (ROW) frequencies. The separated tones are converted into square waves and fed to a digital detector. (See the block diagram.) The digital detector checks the two tones to see if they are within the valid DTMF frequency bands. If they are, it sends a DETECT signal to the steering circuit, and sends the appropriate column and row address signals to a code converter. The code converter encodes the received and detected DTMF signal, and outputs an ENABLE signal to the steering circuit. Based on the DETECT and ENABLE signals, the steering circuit outputs an Early Steering (ESt) signal, which sets the ESt pin to HIGH, indicating that a valid DTMF signal has been detected. If a series of pulses is input at the ACK pin while ESt is HIGH, a decoded DTMF signal is output to the SD pin as a binary code. (See Figure 3 for the overall timing.) If a pulse sequence is input at the ACK pin, the data is latched at the rising edge of the first pulse by a parallelserial converter, and at the same time, the LSB is output from the SD pin. Following this, three bits of data are output from the SD pin for each bit of each pulse in the pulse sequence input from the ACK pin. As a result, a total of four bits of data are output for the four pulses. (See Figure 4 for the ACK and SD timing.) If the pulse sequence input to the ACK pin consists of three or fewer pulses, the next DTMF input cannot be decoded properly. Any ACK pulses in excess of four are ignored until ESt goes HIGH again. Table 1 shows the format of serial data output from the SD pin.
BU8871F
(2) Overall timing chart
(3) ACK and SD timing
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FCircuit operation (4) Serial data correspondence table
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FApplication example
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FSelecting attached components (1) Power supply components
BU8871F
C502 : This is the VDD bypass capacitor, and is normally 100F. The maximum recommended operating power supply voltage is 5.25V, so a voltage withstand value of 6.3V is sufficient. JP501 : This is normally shorted. To test the current consumption of the IC, insert a DC ammeter in place of JP501.
(2) Oscillation components X501 : Use a crystal or ceramic resonator with an oscillation frequency of 4.194304MHz. If using a ceramic resonator, there may be problems with the precision of the oscillation frequency, so please consult the manufacturer of the resonator to make sure problems will not occur. C591 : If you are using the X501 dedicated resonator designed for DTMF receivers, capacitor C591 should be left open. If you are injecting an external clock, X501 should be omitted and DC blocking capacitor C591 used in its place. Typically, this capacitor should be 47nF. (3) DTMF input
C501 : This is the DC blocking capacitor. Select a capacitor that will pass DTMF signals (greater than 697Hz) without significantly attenuating the signals.
JP592 : If DTMF signals are being input directly, both ends should be shorted. Q591 Use these to increase the sensitivity of R591 X R595 the DTMF receiver. C592, C593
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BU8871F
(4) ESt output The ESt guard time is determined by the CPU of the host computer, but to reduce the load on the host computer, the guard time can be set using an external circuit, as shown below.
The relation between a momentary falter in the ESt guard time (t.GL), a momentary HIGH level in the ESt guard time (tGH), and the time constant is shown below. Figure 10 shows a timing diagram for guard times.
FOperation notes S Oscillation Oscillation frequency precision can be a problem with ceramic resonators. Before including a ceramic resonator in your design, please consult the resonator manufacturer to make sure this will not be a problem.
Also, if an external clock is being injected, a DC blocking capacitor must be inserted. Select a capacitor that will neither attenuate the frequency components or put an excessive load on the drive side.
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BU8871F
This LSI is not equipped with the power-on reset function. Also, since the internal circuit (flip-flop circuit) becomes unstable at the rising edge of the power supply, the internal circuit is initialized as shown below by the first DTMF sequence received after the rising edge of the power supply. Therefore, input four dummy ACK pulses before the DTMF reception.
FElectrical characteristic curves
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BU8871F
FApplication board patterns
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FExternal dimensions (Units: mm)
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